Introduction: The Enigma of Android SoCs

Modern Android Systems-on-Chip (SoCs) are incredibly complex black boxes. For security researchers and hardware enthusiasts, understanding their internal architecture, undocumented peripherals, and proprietary registers presents a formidable challenge. Traditional software-based reverse engineering, while powerful for user-space applications and even kernel modules, often falls short when attempting to map the deep hardware internals, especially custom IP blocks or low-level bootrom logic. Access to datasheets is rare, and even JTAG/SWD ports are frequently locked down or removed in production devices. This is where hardware-level techniques become indispensable, with fault injection emerging as a powerful, albeit destructive, methodology for probing and mapping these elusive internals.

Fault injection involves introducing transient, controlled disturbances into a target system to observe its abnormal behavior. By carefully analyzing how the system responds to these faults, we can infer details about its internal state, logic, and even uncover hidden functionalities or vulnerabilities. For Android SoCs, this translates to understanding how various voltage rails, clock signals, or electromagnetic fields influence core processing, memory operations, and peripheral interactions, providing a unique lens into the chip’s design.

Understanding Fault Injection for SoC Exploration

Several types of fault injection techniques can be leveraged to interrogate SoC internals:

Voltage Glitching

Voltage glitching involves momentarily disrupting the stable power supply of the SoC. This brief drop or spike in voltage can cause a CPU instruction to misexecute, a memory bit to flip, or a state machine to transition incorrectly. The effect is typically localized and transient, making it ideal for pinpointing specific operations or registers. By observing what code paths are affected or what data is corrupted, researchers can infer the hardware components involved in those operations. For instance, a glitch during a cryptographic operation might reveal details about the hardware crypto engine.

Clock Glitching

Clock glitching entails introducing a short, irregular pulse or a complete interruption into the SoC’s clock signal. Processors and peripherals rely on precise clock timings to synchronize their operations. A clock glitch can cause instructions to be skipped, executed twice, or lead to incorrect state updates. This technique is particularly effective for manipulating time-sensitive logic, such as boot sequences, security checks that involve timing, or internal state machines within peripherals.

Electromagnetic Fault Injection (EMFI)

EMFI uses precisely generated electromagnetic pulses to induce faults within the chip. Unlike voltage or clock glitching, which often affect a broader area, EMFI can be highly localized, targeting specific transistors or gates without direct physical contact to the internal circuitry (though the external package is still targeted). This non-invasive nature and precision make EMFI a sophisticated tool for advanced black-box analysis, potentially revealing the physical layout of critical components by mapping fault locations to observed effects.

Practical Application: Mapping Internal Registers via Voltage Glitching

Let’s focus on a practical scenario: using voltage glitching to map the behavior of internal registers or memory regions on an Android SoC. This requires specialized hardware and a methodical approach.

Setup and Tooling

• Target Device: A spare Android phone or a development board with an exposed SoC (e.g., a device where you can solder directly to the SoC’s power rails).
• Power Supply: A stable, adjustable DC power supply.
• Oscilloscope: Essential for monitoring voltage rails and synchronizing glitch timing.
• Arbitrary Waveform Generator (AWG) / Glitching Hardware: Devices like the ChipWhisperer, PicoEMP, or custom-built MOSFET-based glitching circuits are used to generate the precise voltage pulses.
• Fine-gauge wires and soldering equipment: For connecting to VCC/GND pins directly on the SoC package.
• UART/JTAG Adapter: For debugging and logging output from the target SoC.

The Glitching Process (Step-by-Step)

The core idea is to execute a controlled piece of code on the target SoC and introduce a fault at a precise moment, observing the deviation from expected behavior.

Step 1: Identify a Target Operation

Choose a simple, repeatable operation. This could be:

• A loop that writes incremental values to an accessible memory location.
• A function that toggles a GPIO pin multiple times.
• A security check that compares two values.

For mapping registers, a common approach is to write a known value to a suspected register address (if you can infer or guess one) and then attempt to glitch the write operation, subsequently reading back the value. Alternatively, you can use a loop that performs a simple arithmetic operation repeatedly, trying to induce errors.

Step 2: Connect and Prepare the Target

Carefully solder fine wires to the VCC and GND pins of the SoC’s main power rail (or a critical internal rail if identified). Connect these to your glitching hardware and oscilloscope. Connect a UART adapter to the device’s debug port (if available) to capture logs.

Step 3: Define Glitch Parameters and Triggering

This is the most critical and iterative step. You need to define:

• Glitch Type: Typically a short voltage drop (e.g., 0V for a few nanoseconds).
• Glitch Width: The duration of the voltage disruption (e.g., 5ns, 10ns, 20ns).
• Glitch Amplitude: The voltage level during the disruption (e.g., 0V, 0.5V).
• Glitch Delay: The timing of the glitch relative to a trigger event. This trigger could be the start of your test code execution, a specific instruction fetch detected by an external logic analyzer, or a GPIO toggle.

# Example pseudo-code for a test function on the SoC (e.g., via a bootloader or simple firmware) void test_register_access() {     volatile unsigned int *reg_addr = (volatile unsigned int *)0xFEEDC0DE; // Suspected register address     unsigned int initial_val = 0x12345678;     unsigned int check_val = 0xABCDEF00;     *reg_addr = initial_val; // Write initial value     // This is the point where we want to glitch - during the write     // The oscilloscope would trigger here.     if (*reg_addr == initial_val) {         // Expected behavior         UART_PRINT(

        
        
        

            

                
            
            

                
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