Introduction to Fault Injection and Android SoC Security

Modern Android System-on-Chips (SoCs) employ robust security features, with the bootloader acting as the first line of defense. It’s responsible for verifying the integrity of subsequent boot stages, preventing unauthorized code execution. However, physical fault injection techniques, such as voltage glitching, can exploit transient hardware vulnerabilities to bypass these protections, potentially enabling root access or arbitrary code execution.

Voltage glitching involves intentionally introducing momentary power supply disturbances (glitches) to a target SoC’s power rail at critical moments during its operation. These glitches can cause the CPU to misexecute instructions, skip security checks, or corrupt data, leading to exploitable states. This guide provides a practical, expert-level overview of applying voltage glitching to Android SoCs for bootloader bypass.

Understanding Bootloader Security and Glitching Targets

The Android boot process begins with the BootROM, an immutable code residing in the SoC’s hardware. The BootROM loads and verifies the primary bootloader (PBL), which in turn loads and verifies the secondary bootloader (SBL) or other boot stages. Each verification step typically involves cryptographic signature checks. Our goal is to glitch the SoC during one of these critical verification routines, causing it to proceed to the next stage without a successful check, or to enter a debug mode.

Key targets for voltage glitching often include the core power rails (e.g., VDD_CORE, VDD_CPU) responsible for powering the CPU and associated logic. Precise timing is crucial; the glitch must coincide with the execution of security-critical instructions (e.g., signature verification, comparison operations).

Hardware Requirements for Voltage Glitching

• Target Device: An Android device with an accessible SoC, preferably one with easily identifiable test points or power rails.
• Fault Injection Platform: A specialized device capable of generating precise voltage glitches (e.g., ChipWhisperer, custom FPGA-based platforms).
• Oscilloscope: For monitoring power rails, clock signals, and precisely timing glitches.
• Logic Analyzer: To observe digital signals, identify instruction execution points.
• Fine-Pitch Soldering Equipment: For attaching wires to small SoC test points or decoupling capacitors.
• Micro-Probes and Adapters: For non-invasive or minimal-invasive probing.
• Current Probe: To monitor instantaneous current draw, aiding in glitch timing.
• Software Defined Radio (SDR) / JTAG Debugger: For post-glitch analysis and interaction.

Step-by-Step Methodology

1. Device Preparation and Power Rail Identification

The first step involves physically preparing the Android device. This typically means partial disassembly to expose the SoC and its surrounding components. We need to identify the primary power rails for the CPU core.

• Schematic Analysis: If available, obtain the device’s schematics to locate VDD_CORE, VDD_CPU, and other critical power nets.
• Visual Inspection: Look for large decoupling capacitors near the SoC, especially those associated with power management ICs (PMICs). These often indicate core power rails.
• Continuity Check: Use a multimeter in continuity mode to trace identified points back to the PMIC or other power sources.

Once identified, carefully solder a thin, insulated wire to the target power rail (e.g., the positive terminal of a core capacitor) and another to a reliable ground point. These will connect to your fault injection platform.

2. Setting up the Fault Injection Platform

Connect the soldered wires from the target device to the fault injection platform. The fault injection platform needs to be configured to sink current from the power rail for a very short duration, creating a voltage drop.

3. Characterizing the Boot Process

Before glitching, it’s essential to understand the target’s boot timing. Use an oscilloscope connected to the CPU’s clock signal or a reliable output pin to trigger on the initial power-on sequence. Observe the power consumption profile (using a current probe) and look for distinct changes corresponding to different boot stages (e.g., BootROM execution, PBL loading, SBL execution).

4. Developing the Glitch Profile: Timing, Width, and Amplitude

This is the most iterative and critical part. We aim to inject a glitch during a specific, vulnerable instruction window.

• Timing (Delay): This refers to the time from a trigger event (e.g., power-on reset, clock edge) to the start of the glitch. Start with a wide range of delays and narrow down based on observed effects.
• Width (Duration): The length of time the voltage is dropped. Typically in the nanosecond to low microsecond range.
• Amplitude (Depth): How much the voltage drops. This is controlled by the fault injection platform’s parameters (e.g., resistance of the glitching path, current sink capability).

A common approach is to perform a grid search over these parameters. For instance, start with a fixed width and iterate through delays. Then, refine the width and amplitude.

Example Glitch Iteration Pseudo-Code (ChipWhisperer-like):

import timechip = ChipWhisperer() # Initialize fault injection platformtarget = AndroidTarget() # Interface to control target device (e.g., reset, power cycle)delays = range(1000, 50000, 100) # Glitch delays in clock cycles or ns (example)widths = range(10, 500, 10) # Glitch widths in clock cycles or ns (example)for delay in delays:    for width in widths:        print(f

        
        
        

            

                
            
            

                
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